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  ??1qla?|3--?q weltrend semiconductor, inc. s|?????u~??u~afe?? 24 ?1 2 ? 2f, no. 24, industry e. 9 th rd., scienc e - based industrial park, hsin - chu, taiwan tel:886 - 3 - 5780241 fax:886 - 3 - 5794278.5770419 email:support@weltrend.com.tw ` WT751002S pc power supply supervisor data sheet rev. 1 . 0 0 november 04 , 200 5 the information in this document is subject to change without notice. weltrend semiconductor, inc. all rights reserved. free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 2 general description th e WT751002S provides protection circuits, power good output (pgo), fault protection latch (fpob), and a protection detector function (psonb) control. it can minimize external components of switching power supply systems in personal computer. the over volta ge detector (ovd) monitors v 33, v 5 and v cc input voltage level. the under voltage detector ( uvd ) monitors v 33 and v 5 input voltage level. when ovd or uvd detect the fault voltage level, the fpob is latched high and pgo go low. when pgi detect the fault vol tage level, the fpob would be kept low and pgo go low. the latch can be reset by psonb go high. there is 3.5 ms delay time for psonb turn off fpob. when pgi and ovd and uvd detect the right voltage level, the power good output (pgo) will be issue. feature s the over voltage detector (ovd) monitors v33 , v 5 and vcc input voltage. the under voltage detector ( uvd ) monitors v33 and v 5 input voltage. both of the power good output (pgo) and fault protection latch (fpob) are open drain output. 75 ms time delay for uvd. 300 ms time delay for pgo. 38 ms for psonb input signal de ? bounce. 73 us for pgi and uvd internal signal de ? glitches. 55 us for ovd internal signal de ? glitches. 3.5 ms time delay for psonb turn - off fpob. the uvd would been d isabled when pgi < 0.95 v . pin assignment and p ackage type ordering information package 8 ? pin plastic dip 8 ? pin plastic so p chip WT751002S ? n 085 WT751002S ? s085 lead ? free ?] pb ?^ WT751002S ? n 085 pb WT751002S ? s085 pb WT751002S - hxxx ? the top - side marking would be added a dot ?]??^ in the right side for lead - free package. pgi gnd fpob psonb pgo vcc v5 v33 8 7 6 5 1 2 3 4 WT751002S free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 3 pin description pin name type description pgi i power good input signal pin gnd p ground fpob o fault protection output pin, open drain output psonb i on/off s witch input v33 i 3.3v over voltage & under voltage v5 i 5v over voltage & under voltage vcc i power supply pgo o power good output signal pin, open drain output function table pgi pd on_n uv d ov d fpl_n pgo < 0.95v l n o n o l l < 0.95v l no y es h l < 0.95v l yes n o l l 0.95 v < pgi < 1.2 v l n o n o l l 0.95 v < pgi < 1.2 v l no y es h l 0.95 v < pgi < 1.2 v l y es n o h l pgi > 1.2 l n o n o l h pgi > 1.2 l no yes h l pgi > 1.2 l yes n o h l x h x x h l x = don?t care free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 4 block diagram WT751002S - 080 r s q + - + - + - + - + - + - + - vcc vcci psonb v33 v5 vcc fpob pgo pgi pgi 1 = 1.2v pgi 2 = 0.95v un un wt750202c-085 block diagram 55us 73us clr debounce clr debounce 1.2v un ov un ov ov 300ms 75ms clr clr 73us debounce delay delay clr 3.5ms power on reset clr delay pwr 1.2v ~ 1.8v 38ms power reference internal bandgap osc pwr clk vcci = 3.6v vref = 1.2v pwr debounce free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 5 absolute maximum rat ings parameter min. max. unit supply voltage, vcc ? 0.3 16 v input voltage pgi , psonb , v5, v33 ? 0.3 vcc + 0.3 ?] max. 7v ?^ v pgo ? 0.3 7 v output voltage fpob ? 0.3 16 v operating temperature - 40 125 j storage temperature - 55 150 j *note: stresses above those listed may cause permanent damage to the devices recommended operatin g conditions parameter c onditions min. typ. max. unit supply voltage, vcc 4 12 15 v input voltage pgi , psonb, v5, v33 7 v pgo 7 v output voltage fpob 15 v fpob 0.3v 10 ma output sink current pgo 0.3v 10 ma supply voltage rising time 1 ms electrical cha racteristics, at ta=25 c and v cc =5v . over voltage detection parameter condition min. typ. max. unit v33 3. 7 3. 9 4.1 v v5 5.7 6.1 6.2 v over voltage threshold vcc 1 2 . 9 13.4 1 3 .9 v i leakage leakage current (fpob) v( fpob ) = 5v 5 ua v ol low level ou tput voltage ( fpob ) i sink = 10ma 0.3 v under voltage detection ?b pgi ?b pgo parameter condition min. typ. max. unit v33 2. 0 2. 2 2. 4 v under voltage threshold v5 3.3 3.5 3.7 v pgi1 1.1 6 1. 2 0 1. 24 v input threshold voltage (pgi) pgi2 0.90 0.95 1.00 v i leakage leakage current (pgo) pgo = 5v 5 ua v ol low level output voltage(pgo) i sink = 10ma 0.3 v psonb parameter condition min. typ. max. unit input pull - up current psonb= 0v 150 ua high - level input voltage 1.8 v low - level input voltage 1. 2 v free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 6 total device parameter condition min. typ. max. unit icc supply current pdon _n= 5v 1 ma vcc start - up voltage 3 .4 v vcc stop voltage after start - up 3.0 v switching characteri stics , vcc=5v parameter condition min. typ. max. unit t db1 de - bounce time (psonb) 24 38 52 ms t d elay 1 delay time (pgi to pgo) 2 0 0 3 0 0 400 ms t db2 de - bounce time (psonb) 24 38 5 2 ms t g 1 de - glitch time for pgi 47 73 100 us t g 2 de - glitch time for uvd 47 73 100 us t g 3 de - glitch time for ovd 3 5 55 75 us t delay2 psonb to fpob delay time t db2 +2. 0 t db2 +3.5 t db2 + 5.0 ms t delay3 internal uvd delay time after fpob go low or e very time pgi > 1.2v 49 75 1 00 ms application circuit pgi psonb v33 v5 vcc fpob gnd pgo r4=100 +5vsb d1 +12v pgo +5vsb +3.3v +5v 0.01uf r5=300 10k +5vsb psonb pgi +5vsb +5v 1k note 1 ?g t he series resistor r5 at psonb can not be omitted. ?] r 5 = 300 [ is suggested ?^ note 2 ?g t he series resistor r4 = 100 [ and diode d1 at pgo is suggested . free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 7 application timming 1.) pgi (under_voltage) ?g psonb fpob pgo pgi t db1 t delay1 +t g 1 t db2 t delay2 t delay1 +t g 1 t g 1 free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 8 2.) v33 / v5 uvd ?g psonb fpob pgo v33 / v 5 t db1 t delay1 +t g 1 t db2 t delay2 psonb fpob pgo pgi v33 / v 5 t db1 t delay1 +t g 1 t db2 t delay2 t delay3 +t g 2 t db1 free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 9 3.) v33 / v5 / v cc ovp ?g psonb fpob pgo v33 / v5 / v cc t db1 t delay1 +t g 1 t db2 t delay2 psonb fpob pgo v33 / v5 / v cc t db1 t delay1 +t g 1 t db2 t delay2 t g 3 t db1 free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 10 mechanical information plastic dual ? in ? line 8pin package note 1 ?g all linear dimensions are in inches ?] millimeters ?^ . note 2 ?g this drawing is subject to change without notice. note 3 ?g falls within jedec ms ? 001 free datasheet http:///
wt 751002s rev. 1 . 0 0 weltrend semiconductor, inc. page 11 plastic small ? outline 8pin package note 1 ?g all linear dimensions are in inches ?] millimeters ?^ . note 2 ?g this drawing is subject to change without notice. note 3 ?g falls within jedec ms ? 012 free datasheet http:///


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